====== JTAG ======

The FPGA's on all ZTEX USB-FPGA Modules can be configured either via USB or via JTAG. 

===== Series 2 FPGA Boards =====
JTAG signals on all [[http://www.ztex.de/usb-fpga-2/|Series 2 FPGA Boards]] are provided at pins A31 (TDI), B31 (TCK), C31 (TDO), D31 (TMS) and A32 (VIO) of the external I/O connector. JTAG headers are available on some FPGA boards as an option (if there is enough space) and on base boards, namely the Debug Board, the Cluster Board and the Series 1 Adapter.

No firmware is required for configuration via JTAG.

===== Series 1 FPGA Boards =====
JTAG signals on [[http://www.ztex.de/usb-fpga-1/usb-fpga-1.11.e.html|USB-FPGA Modules 1.11]] and [[http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html|1.15]] are provided at pins D29 (TDI), D30 (TMS), D31 (TCK) and D32 (TMS) of the I/O connector. On both FPGA Boards JTAG-I/O voltage is 2.5V. JTAG headers are available on all base boards, namely Power Supply modules and Experimental Boards, see the products pages for more details.

[[http://www.ztex.de/usb-fpga-1/usb-fpga-1.15x.e.html|USB-FPGA Modules 1.15x]] and [[http://www.ztex.de/usb-fpga-1/usb-fpga-1.15y.e.html|1.15y]]
have on-board JTAG headers.

In order to enable JTAG configuration the PROG_B pin of the FPGA which is connected to bit 1 of port A of the EZ-USB must be driven high. This happens automatically if a Firmware developed with the SDK is installed. 

If the JTAG interface is used it may be helpful to upload a Firmware (e.g. the [[standalone|standalone example Firmware]]) to the EEPROM in order to avoid to reload a Firmware every time the device is powered up.

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