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en:ztex_boards:ztex_fpga_boards:bitstream_encryption [2014/07/15 21:46] stefanen:ztex_boards:ztex_fpga_boards:bitstream_encryption [2016/09/11 10:51] stefan
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 ====== Bitstream Encryption ====== ====== Bitstream Encryption ======
-Several ZTEX FPGA Boards support Bitstream encryption, e.g. USB-FPGA Modules 2.16, 2.13 and 1.15y.+Several ZTEX FPGA Boards support Bitstream encryption, e.g. [[http://www.ztex.de/usb-fpga-2|USB-FPGA Modules 2.16, 2.13, 2.14 and 2.17]].
  
 The key which is used to decrypt the bitstream is stored in special low power memory of the FPGA which is powered by a battery. This battery is an option and not installed by default. The key which is used to decrypt the bitstream is stored in special low power memory of the FPGA which is powered by a battery. This battery is an option and not installed by default.
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 Using encrypted bitstreams is quite simple: Using encrypted bitstreams is quite simple:
  
-  - Generate an encrypted bitstream either (**ISE only**:) using the ''bitgen'' option ''-g Encypt:Yes'' and ''-g KeyFile:<.nky file>'' or (**Vivado only:**) using the constraints <code tcl>set_property BITSTREAM.ENCRYPTION.ENCRYPT Yes [current_design]+  - Generate an encrypted bitstream either (**ISE**) using the ''bitgen'' option ''-g Encypt:Yes'' and ''-g KeyFile:<.nky file>'' or (**Vivado**) using the constraints <code tcl>set_property BITSTREAM.ENCRYPTION.ENCRYPT Yes [current_design]
 set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT bbram [current_design] set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT bbram [current_design]
-set_property BITSTREAM.ENCRYPTION.KEYFILE <.nky file> [current_design]</code> If no key file (.nky file) is given a new one with random key is created. The ''ucecho'' example for USB-FPGA Modules 2.16 and 2.13 already contains encrypted bitstreams (''ucecho-encrypted.bit'') and corresponding key file (''ucecho-encrypted.nky'')+set_property BITSTREAM.ENCRYPTION.KEYFILE <.nky file> [current_design]</code> If no key file (.nky file) is given a new one with random key is created.  
-  - Upload the key (.nky file) to the FPGA through JTAG using Xilinx Impact +  - Upload the key (.nky file) to the FPGA through JTAG using Xilinx tools 
-  - FPGA now accepts the encrypted bitstream+  - FPGA now accepts the encrypted bitstream (no special load technique is required but some options like bitstream compression may not work)
  
 
en/ztex_boards/ztex_fpga_boards/bitstream_encryption.txt · Last modified: 2016/11/24 23:29 by stefan
 
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