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JTAG

The FPGA's on ZTEX FPGA Boards can be configured either via USB or via JTAG. JTAG signals are available at Pins D29 to D32 of the I/O connector. If the Experimantal Board or the Power Supply Module is used the JTAG signals are provided on a 8 pin connector with the following pin allocation:

Pin Description
1 +3.3V
2 +2.5V
3 Not connected
4 TMS
5 TCK
6 TDI
7 TDO
8 GND

The I/O voltage for the JTAG signals is 2.5V. The 3.3V pin can be used for the power supply of the JTAG cable.

In order to enable JTAG configuration the PROG_B pin of the FPGA which is connected to bit 1 of port A of the EZ-USB must be driven high. This happens automatically if a Firmware developed with the SDK is installed.

If the JTAG interface is used it may be helpful to upload a Firmware (e.g. the standalone example Firmware) to the EEPROM in order to avoid to reload a Firmware every time the device is powered up.

 
en/ztex_boards/ztex_fpga_boards/jtag.1295436935.txt.gz · Last modified: 2013/11/25 20:00 (external edit)
 
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