http://wiki.ztex.de/ 2012-02-06T20:29:42+00:00 http://wiki.ztex.de/ http://wiki.ztex.de/lib/images/favicon.ico text/html 2012-01-20T16:26:51+00:00 http://wiki.ztex.de/doku.php?id=en:software:usb_ids&rev=1327076811&do=diff Usually USB products are identified using two ID's, the vendor ID and the product ID. The vendor ID must be purchased from the USB Implementers Forum (USB-IF). The product ID is assigned by the vendor. According to the USB-IF rules the vendor ID must only be used by the manufacturer of a product. text/html 2012-01-17T20:12:59+00:00 http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:high_speed_configuration&rev=1326831179&do=diff USB-FPGA Modules 1.15 and 1.15x support different configuration speeds: FPGA Board Low speed (via EP0) High speed (via bulk Endpoint) USB-FPGA Modules 1.15 0.6 MByte/s 24 MByte/s (using the CPLD) USB-FPGA Modules 1.15x 0.6 MByte/s 1.4 MByte/s The high speed configuration mode requires an bulk output Endpoint. Two macros must be called in order to enable the feature: text/html 2012-01-17T19:55:00+00:00 http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:memory_tutorial_1_15&rev=1326830100&do=diff This tutorial explains how the memory controller IP Core is created on USB-FPGA-Modules 1.15. Creating the IP Core This section describes how the IP Core is created in an ISE project. The MIG version used for the screen shots below was MIG 3.5 (of ISE version 12.2). The settings for other versions should be very similar. text/html 2012-01-13T14:12:04+00:00 http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:first_steps_with_ise&rev=1326463924&do=diff This section describes how FPGA bitstreams are generated and how new projects are created. Generating the Bitstream This section describes how the bitstream of an example of the SDK is created with Xilinx ISE. * Start the Xilinx ISE * In the menu: 'File' -> 'Open Project' -> select the .xise project file in the 'fpga' sub-directory the the example and click 'Open' * Single-click on the main source file in the source hierarchy field (1) and double click on 'Generate Programming File' in… text/html 2012-01-10T10:00:50+00:00 http://wiki.ztex.de/doku.php?id=en:getting_started&rev=1326189650&do=diff This page gives an overview about the Tutorials available on this Wiki. SDK Tutorials * Running an Example * Compiling an Example FPGA Board related tutorials * First steps with ISE * Clock tutorial * Memory tutorial for USB-FPGA-Modules 1.11 * Memory tutorial for USB-FPGA-Modules 1.15 text/html 2012-01-09T21:11:39+00:00 http://wiki.ztex.de/doku.php?id=de:projects:start&rev=1326143499&do=diff Diese Seite ist für die Präsentation von Beispielprojekten gedacht. Examples from the package Verzeichnis Beschreibung examples/usb_fpga-1.2/ucecho Einfaches Beispiel für ZTEX USB-FPGA-Module 1.2, welches vom Benutzer eingegebene Zeichenketten mittels des FPGA's in Großbuchstaben konvertiert text/html 2011-12-26T11:52:46+00:00 http://wiki.ztex.de/doku.php?id=en:discussions:c_c_host_software_linking&rev=1324900366&do=diff I have been using Java for host software without problems, but prefer to use C++ in Microsoft Developer Studio. I have seen the ucecho example, but I don't know how you link the DLL into the project - in Developer Studio I get 'unresolved externals' from the USB calls, because the DLL doesn't come with a LIB file for implicit linking. text/html 2011-12-14T12:38:24+00:00 http://wiki.ztex.de/doku.php?id=en:projects:btcminer&rev=1323866304&do=diff BTCMiner is an Open Source Bitcoin Miner for ZTEX USB-FPGA-Modules 1.15b and 1.15d and USB-FPGA-Modules 1.15x. The latter variant is optimized for cryptographic computations such as Bitcoin Mining and allows to build up FPGA clusters using standard components (USB cables and USB hubs). text/html 2011-12-08T14:05:22+00:00 http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:ztex_fpga_boards&rev=1323353122&do=diff Articles * JTAG * Standalone apllications * First steps with ISE * Clock tutorial * Memory tutorial for USB-FPGA Modules 1.11 * Memory tutorial for USB-FPGA Modules 1.15 * USB Powering * Power supply selection guide * PMOD Modules * High speed configuration of USB-FPGA Module 1.15