<?xml version="1.0" encoding="utf-8"?>
<!-- generator="FeedCreator 1.7.2-ppt DokuWiki" -->
<?xml-stylesheet href="http://wiki.ztex.de/lib/exe/css.php?s=feed" type="text/css"?>
<rdf:RDF
    xmlns="http://purl.org/rss/1.0/"
    xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
    xmlns:slash="http://purl.org/rss/1.0/modules/slash/"
    xmlns:dc="http://purl.org/dc/elements/1.1/">
    <channel rdf:about="http://wiki.ztex.de/feed.php">
        <title>ZTEX Wiki</title>
        <description></description>
        <link>http://wiki.ztex.de/</link>
        <image rdf:resource="http://wiki.ztex.de/lib/images/favicon.ico" />
       <dc:date>2012-05-18T16:44:48+00:00</dc:date>
        <items>
            <rdf:Seq>
                <rdf:li rdf:resource="http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:porting_to_1_15y&amp;rev=1337335888&amp;do=diff"/>
                <rdf:li rdf:resource="http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:ztex_fpga_boards&amp;rev=1337334041&amp;do=diff"/>
                <rdf:li rdf:resource="http://wiki.ztex.de/doku.php?id=en:software:start&amp;rev=1337106642&amp;do=diff"/>
                <rdf:li rdf:resource="http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:high_speed_configuration&amp;rev=1337106567&amp;do=diff"/>
                <rdf:li rdf:resource="http://wiki.ztex.de/doku.php?id=en:software:porting&amp;rev=1336983889&amp;do=diff"/>
                <rdf:li rdf:resource="http://wiki.ztex.de/doku.php?id=en:discussions:video_streaming&amp;rev=1336137237&amp;do=diff"/>
                <rdf:li rdf:resource="http://wiki.ztex.de/doku.php?id=de:discussions:fwloader&amp;rev=1335788447&amp;do=diff"/>
                <rdf:li rdf:resource="http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:cluster_power_supplies&amp;rev=1334849355&amp;do=diff"/>
            </rdf:Seq>
        </items>
    </channel>
    <image rdf:about="http://wiki.ztex.de/lib/images/favicon.ico">
        <title>ZTEX Wiki</title>
        <link>http://wiki.ztex.de/</link>
        <url>http://wiki.ztex.de/lib/images/favicon.ico</url>
    </image>
    <item rdf:about="http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:porting_to_1_15y&amp;rev=1337335888&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2012-05-18T10:11:28+00:00</dc:date>
        <title>Porting to USB-FPGA Modules 1.15y - [Host software] </title>
        <link>http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:porting_to_1_15y&amp;rev=1337335888&amp;do=diff</link>
        <description>In order to simplify the porting of applications from USB-FPGA Modules 1.15d and 1.15x to USB-FPGA Modules 1.15y the FPGA Boards are designed to be as compatible as possible.

FPGA


The I/O signals of the EZ-USB FX2 micro controller are shared by all FPGA's. These signals form a bus which is controlled by the FX2 USB controller using chip select (CS) signals. This is depicted in the USB-FPGA Module 1.15y block diagram:</description>
    </item>
    <item rdf:about="http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:ztex_fpga_boards&amp;rev=1337334041&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2012-05-18T09:40:41+00:00</dc:date>
        <title>ZTEX FPGA boards - [Articles] </title>
        <link>http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:ztex_fpga_boards&amp;rev=1337334041&amp;do=diff</link>
        <description>Articles

	*  JTAG  
	*  Standalone apllications
	*  First steps with ISE
	*  Clock tutorial
	*  Memory tutorial for USB-FPGA Modules 1.11
	*  Memory tutorial for USB-FPGA Modules 1.15
	*  USB Powering
	*  Power supply selection guide
	*  Cluster power supplies
	*  PMOD Modules
	*  High speed configuration of USB-FPGA Module 1.15
	*  Porting to USB-FPGA Modules 1.15y</description>
    </item>
    <item rdf:about="http://wiki.ztex.de/doku.php?id=en:software:start&amp;rev=1337106642&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2012-05-15T18:30:42+00:00</dc:date>
        <title>ZTEX EZ-USB SDK</title>
        <link>http://wiki.ztex.de/doku.php?id=en:software:start&amp;rev=1337106642&amp;do=diff</link>
        <description>ZTEX provides a SDK which is especially designed for the ZTEX modules, but also works with other EZ-USB based hardware. The SDK consists in two parts:

	*  The Firmware Kit which is used for building the firmware for the EZ-USB device,
	*  The host software API written in Java.</description>
    </item>
    <item rdf:about="http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:high_speed_configuration&amp;rev=1337106567&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2012-05-15T18:29:27+00:00</dc:date>
        <title>High speed configuration of USB-FPGA Modules 1.15</title>
        <link>http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:high_speed_configuration&amp;rev=1337106567&amp;do=diff</link>
        <description>USB-FPGA Modules 1.15, 1.15x and 1.15y support different configuration speeds:

 FPGA Board   Low speed (via EP0)   High speed (via bulk Endpoint)   USB-FPGA Modules 1.15   0.6 MByte/s   24 MByte/s (using the CPLD)  USB-FPGA Modules 1.15x   0.6 MByte/s   1.4 MByte/s   USB-FPGA Modules 1.15y   0.6 MByte/s   24 MByte/s (using the CPLD) 

The high speed configuration mode requires an bulk output Endpoint. Two macros must be called in order to enable the feature:</description>
    </item>
    <item rdf:about="http://wiki.ztex.de/doku.php?id=en:software:porting&amp;rev=1336983889&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2012-05-14T08:24:49+00:00</dc:date>
        <title>Porting to other Platforms - [MacOS port] </title>
        <link>http://wiki.ztex.de/doku.php?id=en:software:porting&amp;rev=1336983889&amp;do=diff</link>
        <description>The SDK contains two platform dependent components: the JNI library of libusbJava and the macro processor bmp.
The package contains binaries (32 and 64 bit) for Linux and Windows. 

In order to add support for other platform the two platform dependent components need to be rebuild.</description>
    </item>
    <item rdf:about="http://wiki.ztex.de/doku.php?id=en:discussions:video_streaming&amp;rev=1336137237&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2012-05-04T13:13:57+00:00</dc:date>
        <title>Video streaming - created</title>
        <link>http://wiki.ztex.de/doku.php?id=en:discussions:video_streaming&amp;rev=1336137237&amp;do=diff</link>
        <description>&lt;- Discussions


, 2012/05/04 13:07 

I'd like to do video streaming both in and out using the USB interface to the FPGA.  The FPGA will be doing image processing so the purpose of the streaming is to do testing of the image processing in real time.  The host will be Windows 7.  Any suggestions on how to approach doing this?  Will I need to write a streaming driver on Windows?</description>
    </item>
    <item rdf:about="http://wiki.ztex.de/doku.php?id=de:discussions:fwloader&amp;rev=1335788447&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2012-04-30T12:20:47+00:00</dc:date>
        <title>FWLoader: Firmware lässt sich nicht hochladen - [FWLoader] </title>
        <link>http://wiki.ztex.de/doku.php?id=de:discussions:fwloader&amp;rev=1335788447&amp;do=diff</link>
        <description>&lt;- Diskussionen


, 2012/04/30 10:34 

Der FWLoader blockiert beim Hochladen meiner Firmware (main.ihx) in den CY68013,
obwohl sich die UCEcho-Firmware (ucecho.ihx) ohne Probleme hochladen lässt.
Meiner bisherigen Beobachtung nach scheint das Funktionieren des Hochladens
vom Inhalt der Firmware abzuhängen.</description>
    </item>
    <item rdf:about="http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:cluster_power_supplies&amp;rev=1334849355&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2012-04-19T15:29:15+00:00</dc:date>
        <title>Cluster Power Supplies - minor spelling fix</title>
        <link>http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:cluster_power_supplies&amp;rev=1334849355&amp;do=diff</link>
        <description>Because ZTEX FPGA Board communicate via USB it is easily possible to build low cost FPGA clusters using USB hubs. For this purpose typically 
USB-FPGA Modules 1.15x, USB-FPGA Modules 1.15y or USB-FPGA Modules 1.15d (if RAM is required) are used.

This article presents some suggestions for the power supply of such FPGA Board Clusters.</description>
    </item>
</rdf:RDF>

