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| en:ztex_boards:ztex_fpga_boards:first_steps_with_ise [2010/12/05 18:46] – stefan | en:ztex_boards:ztex_fpga_boards:first_steps_with_ise [2016/08/18 07:05] (current) – gelöscht stefan | ||
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| - | ====== First steps with ISE ====== | ||
| - | This section describes how FPGA bitstreams are generated and how new projects are created. | ||
| - | |||
| - | ===== Generating the Bitstream ===== | ||
| - | This section describes how the bitstream of an example of the SDK is created with Xilinx ISE. | ||
| - | |||
| - | - Start the Xilinx ISE | ||
| - | - In the menu: ' | ||
| - | - Single-click on the main source file in the source hierarchy field (1) and double click on ' | ||
| - | - The Bitstream is stored in a bit file, e.g. ucecho.bit. These files can be uploaded via USB using the [[en: | ||
| - | |||
| - | ===== Crating a new project ===== | ||
| - | This section explain how an new project is created | ||
| - | - In the ISE menu: ' | ||
| - | - Enter a project name (e.g. myProject) and the location of the new project | ||
| - | - Select the device settings from the following table | ||
| - | |||
| - | ^ USB-FPGA Module ^ Family ^ Device ^ Package ^ Speed ^ | ||
| - | | 1.2 | Spartan 3 | XC3S400 | ||
| - | |||
| - | ===== Examples ===== | ||
| - | The [[en: | ||
| - | starting point for own applications. | ||
| - | |||
| - | ===== VHDL tutorials ===== | ||
| - | There are many VHDL tutorials available in the Internet. One of them (which is much more than just a tutorial) is | ||
| - | [[http:// | ||
| - | Other ones can be found using [[http:// | ||
| - | |||
| - | {{indexmenu_n> | ||