In order to implement standalone applications the Firmware and the Bitstream have to be stored in non-volatile memory. At power-on the USB controller boots the Firmware from EEPROM or Flash and the Firmware configures the FPGA using a Bitstream stored in Flash.
The Default Firmwares for Series 2 FPGA Boards always support this start-up mode. This page describes how standalone functionality can be enabled in user defined Firmware.
On FX2 based FPGA Boards the standalone functionality is enabled by two macros in the Firmware source code:
ENABLE_FLASH; ENABLE_FLASH_BITSTREAM;
The first macro enables flash support and the second one enables automatic FPGA configuration if the Firmware finds a Bitstream in Flash at start-up. These macros must appear between
#include[ztex-conf.h]
and
#include[ztex.h]
On FX3 based FPGA Boards the Flash support is always enabled. Automatic FPGA configuration is enabled by default, but can be disabled by
#define DISABLE_FLASH_CONFIG
There are several ways to upload the Bitstream to the Flash memory:
-um
parameter of the FWLoader command line utility
FPGA configuration from SPI Flash may not work with default bitstream settings of Vivado. The recommended settings for bitstream generation are listed below and also can be found in the constraints file constraints/usb-fpga-2.xdc
of the SDK:
set_property CONFIG_VOLTAGE 3.3 [current_design] set_property CFGBVS VCCO [current_design] set_property BITSTREAM.GENERAL.COMPRESS true [current_design] set_property BITSTREAM.CONFIG.CONFIGRATE 33 [current_design] set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR No [current_design] set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 2 [current_design] set_property BITSTREAM.CONFIG.CCLKPIN PULLUP [current_design] set_property BITSTREAM.CONFIG.INITPIN PULLUP [current_design] set_property BITSTREAM.CONFIG.M0PIN PULLUP [current_design] set_property BITSTREAM.CONFIG.M1PIN PULLDOWN [current_design] set_property BITSTREAM.CONFIG.M2PIN PULLUP [current_design] set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]