Slave-FIFO Autoout

, 2011/02/18 21:41

~~DISCUSSION~~ Hi Guys,

I'm having problems setting up the AUTOOUT feature on the FX2 with the FPGA-Board 1.2. I've been trying to get things running for three days now with no luck.

Here's the setup:

  IFCONFIG = 0xA3; SYNCDELAY;
  FIFOPINPOLAR = 0x00; SYNCDELAY; // All fifo pins low active
  EP2CFG = 0xA0; SYNCDELAY;
  EP2FIFOCFG = 0x01; SYNCDELAY; 
  FIFORESET = 0x80; SYNCDELAY; // NAK all transfers
  FIFORESET = 0x02; SYNCDELAY; // Reset FIFO EP2
  FIFORESET = 0x00; SYNCDELAY; // Restore normal operation
  
  OUTPKTEND = 0x82; SYNCDELAY; // Skip one outpacket on EP2
  OUTPKTEND = 0x82; SYNCDELAY; // Skip one outpacket on EP2

  // Zero to one for AUTOOUT enable
  EP2FIFOCFG = 0x11; SYNCDELAY;

The device uses EP2 configured as BULK output with 4x 512 byte buffers and 16 bit output. After the configuration the CPU is held in idle (while(1){}). The FX2-FIFO is set to be clocked internally by the 48 MHz clock. The external FX2 control-pins SLOE and SLRD are low active.

I build a state-machine in VHDL to continuously read the data from the HOST by the FPGA. The pins SLRD and SLOE are asserted (set to 0) until the (low-active) FIFO_EMPTY flag of the FX2 is falling from 1 to 0. By using Chip-Scope one can clearly see that the FIFO_EMPTY is asserted every 256 clock cycles.

I'm using libusb under Ubuntu Linux continously calling usb_bulk_write with messages of 512 bytes each.

The problem is that the sampled data is always equal to the first sample send by the host, i.e. when sending the sequence 0,1,2,3…255 the FPGA always receives 0,0,0,….0 (read using chipscope). Setting the first value to any other number lets the FPGA receive that number but the FIFO data pointer somehow does not increment.

I'm puzzled about the result and whatever I do (and I tried a bunch of things!) I can't get the FX2 AUTOOUT feature working. Any ideas?