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| Both sides previous revisionPrevious revision | Next revisionBoth sides next revision | ||
| en:ztex_boards:ztex_fpga_boards:bitstream_encryption [2013/11/26 11:34] – stefan | en:ztex_boards:ztex_fpga_boards:bitstream_encryption [2014/07/15 21:42] – stefan | ||
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| ====== Bitstream Encryption ====== | ====== Bitstream Encryption ====== | ||
| - | Several ZTEX FPGA Boards support Bitstream encryption, e.g. | + | Several ZTEX FPGA Boards support Bitstream encryption, e.g. USB-FPGA Modules 2.16, 2.13 and 1.15y. |
| - | [[http:// | + | |
| The key which is used to decrypt the bitstream is stored in special low power memory of the FPGA which is powered by a battery. This battery is an option and not installed by default. | The key which is used to decrypt the bitstream is stored in special low power memory of the FPGA which is powered by a battery. This battery is an option and not installed by default. | ||
| Line 7: | Line 6: | ||
| Using encrypted bitstreams is quite simple: | Using encrypted bitstreams is quite simple: | ||
| - | - Generate an encrypted bitstream. This is done using the '' | + | - Generate an encrypted bitstream |
| + | - (**ISE only**: | ||
| + | - (**Vivado only:**) using the constraints < | ||
| + | '' | ||
| + | '' | ||
| - Upload the key (.nky file) to the FPGA through JTAG using Xilinx Impact | - Upload the key (.nky file) to the FPGA through JTAG using Xilinx Impact | ||
| - FPGA now accepts the encrypted bitstream | - FPGA now accepts the encrypted bitstream | ||
