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--- en:ztex_boards:ztex_fpga_boards:bitstream_encryption [2014/07/15 21:42] – stefan
+++ en:ztex_boards:ztex_fpga_boards:bitstream_encryption [2014/07/15 21:46] – stefan
@@ Line 6: / Line 6: @@
 Using encrypted bitstreams is quite simple:
-  - Generate an encrypted bitstream either
+  - Generate an encrypted bitstream either (**ISE only**:) using the ''bitgen'' option ''-g Encypt:Yes'' and ''-g KeyFile:<.nky file>'' or (**Vivado only:**) using the constraints <code tcl>set_property BITSTREAM.ENCRYPTION.ENCRYPT Yes [current_design]
-    - (**ISE only**:) using the ''bitgen'' option ''-g Encypt:Yes'' and ''-g KeyFile:<.nky file>'' or
+set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT bbram [current_design]
-    - (**Vivado only:**) using the constraints <code>''set_property BITSTREAM.ENCRYPTION.ENCRYPT Yes [current_design]''
+set_property BITSTREAM.ENCRYPTION.KEYFILE <.nky file> [current_design]</code> If no key file (.nky file) is given a new one with random key is created. The ''ucecho'' example for USB-FPGA Modules 2.16 and 2.13 already contains encrypted bitstreams (''ucecho-encrypted.bit'') and corresponding key file (''ucecho-encrypted.nky'').
-''set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT bbram [current_design]
-''set_property BITSTREAM.ENCRYPTION.KEYFILE <.nky file> [current_design]''</code> If no key file (.nky file) is given a new one with random kay is created. The ''ucecho'' example for USB-FPGA Modules 2.16 and 2.13 already contains encrypted bitstreams (''ucecho-encrypted.bit'') and corresponding key file (''ucecho-encrypted.nky'').
   - Upload the key (.nky file) to the FPGA through JTAG using Xilinx Impact
   - FPGA now accepts the encrypted bitstream