Differences

This shows you the differences between two versions of the page.

--- en:ztex_boards:ztex_fpga_boards:bitstream_encryption [2014/07/15 21:42] – stefan
+++ en:ztex_boards:ztex_fpga_boards:bitstream_encryption [2016/09/11 10:51] – stefan
@@ Line 1: / Line 1: @@
 ====== Bitstream Encryption ======
-Several ZTEX FPGA Boards support Bitstream encryption, e.g. USB-FPGA Modules 2.16, 2.13 and 1.15y.
+Several ZTEX FPGA Boards support Bitstream encryption, e.g. [[http://www.ztex.de/usb-fpga-2|USB-FPGA Modules 2.16, 2.13, 2.14 and 2.17]].
 The key which is used to decrypt the bitstream is stored in special low power memory of the FPGA which is powered by a battery. This battery is an option and not installed by default.
@@ Line 6: / Line 6: @@
 Using encrypted bitstreams is quite simple:
-  - Generate an encrypted bitstream either
+  - Generate an encrypted bitstream either (**ISE**) using the ''bitgen'' option ''-g Encypt:Yes'' and ''-g KeyFile:<.nky file>'' or (**Vivado**) using the constraints <code tcl>set_property BITSTREAM.ENCRYPTION.ENCRYPT Yes [current_design]
-    - (**ISE only**:) using the ''bitgen'' option ''-g Encypt:Yes'' and ''-g KeyFile:<.nky file>'' or
+set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT bbram [current_design]
-    - (**Vivado only:**) using the constraints <code>''set_property BITSTREAM.ENCRYPTION.ENCRYPT Yes [current_design]''
+set_property BITSTREAM.ENCRYPTION.KEYFILE <.nky file> [current_design]</code> If no key file (.nky file) is given a new one with random key is created.
-''set_property BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT bbram [current_design]
+  - Upload the key (.nky file) to the FPGA through JTAG using Xilinx tools
-''set_property BITSTREAM.ENCRYPTION.KEYFILE <.nky file> [current_design]''</code> If no key file (.nky file) is given a new one with random kay is created. The ''ucecho'' example for USB-FPGA Modules 2.16 and 2.13 already contains encrypted bitstreams (''ucecho-encrypted.bit'') and corresponding key file (''ucecho-encrypted.nky'').
+  - FPGA now accepts the encrypted bitstream (no special load technique is required but some options like bitstream compression may not work)
-  - Upload the key (.nky file) to the FPGA through JTAG using Xilinx Impact
-  - FPGA now accepts the encrypted bitstream