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| en:ztex_boards:ztex_fpga_boards:sd_cards_on_series_2_fpga_boards [2014/07/15 22:24] – stefan | en:ztex_boards:ztex_fpga_boards:sd_cards_on_series_2_fpga_boards [2014/07/21 12:51] – stefan |
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| By introduction of [[http://www.ztex.de/usb-fpga-2/|Series 2 FPGA Boards]] the microSD socket used on Series 1 FPGA Boards has been replaced by fixed SPI Flash. Nevertheless, SD-Card support can be easily be re-enabled by adding an (micro)SD card socket to the application circuit and routing the signals through FPGA. This is explained best by an example: | By introduction of [[http://www.ztex.de/usb-fpga-2/|Series 2 FPGA Boards]] the microSD socket used on Series 1 FPGA Boards has been replaced by fixed SPI Flash. Nevertheless, SD-Card support can be easily be re-enabled by adding an (micro)SD card socket to the application circuit and routing the signals through FPGA. This is explained best by an example: |
| | |
| | A SD card is connected to an [[http://www.ztex.de/usb-fpga-2/usb-fpga-2.01.e.html|USB-FPGA Module 2.01]] as follows |
| | |
| | | ^ External I/O || ^ FX2 I/O ^^ |
| | ^ Signal ^ pin ^ FPGA pin ^ direction ^ pin ^ FPGA pin ^ |
| | | CS | B13 | K15 | ← (in) | PC1 | N12 | |
| | | DI | B14 | J13 | ← (in) | PC2 | P12 | |
| | | CLK | B18 | J14 | ← (in) | PC3 | N5 | |
| | | DO | B19 | H15 | → (out) | PA2 | H15 | |
| | |
| | The HDL code for routing the signals looks like: |
| | |
| | <code ucf> |
| | # ... |
| | NET "pa2" LOC = "B10" | IOSTANDARD = LVCMOS33 ; # PA2 |
| | NET "pc1" LOC = "N12" | IOSTANDARD = LVCMOS33 ; # PC1/GPIFADR1 |
| | NET "pc2" LOC = "P12" | IOSTANDARD = LVCMOS33 ; # PC2/GPIFADR2 |
| | NET "pc3" LOC = "N5" | IOSTANDARD = LVCMOS33 ; # PC3/GPIFADR3 |
| | |
| | NET "b13" LOC = "K15" | IOSTANDARD = LVCMOS33 ; |
| | NET "b14" LOC = "J13" | IOSTANDARD = LVCMOS33 ; |
| | NET "b18" LOC = "J14" | IOSTANDARD = LVCMOS33 ; |
| | NET "b19" LOC = "H15" | IOSTANDARD = LVCMOS33 ; |
| | |
| | # ... |
| | </code> |
| | |
| | (.ucf constraints file) and |
| | |
| | <code verilog> |
| | // ... |
| | |
| | module top ( |
| | |
| | // ... |
| | |
| | input pc1,pc2,pc3, b19, |
| | output b13,b14,b18, pa2 |
| | ); |
| | |
| | // ... |
| | |
| | assign b13 = pc1; |
| | assign b14 = pc2; |
| | assign b18 = pc3; |
| | assign pa2 = b19; |
| | |
| | // ... |
| | |
| | endmodule |
| | </code> |
| | (verilog HDL file). |
| | |
| | In order to enable firmware support the following lines have to be inserted between ''#include[ztex-conf.h]'' and ''#include[ztex.h]'' |
| | |
| | <code c> |
| | ENABLE_FLASH2; // enables SD support as secondary Flash |
| | #define[MMC_PORT][C] // Port for input signals, valid values: A..D |
| | #define[MMC__PORT_DO][A] // Port for output signals (valid values: A..D, |
| | // can be omitted if equal to input port) |
| | #define[MMC_BIT_CS][1] // Pin number for CS signal, i.e. PC1 |
| | #define[MMC_BIT_DI][2] // Pin number for DI signal, i.e. PC2 |
| | #define[MMC_BIT_DO][2] // Pin number for DO signal, i.e. PA2 |
| | #define[MMC_BIT_CLK][3] // Pin number for CLK signal, i.e. PC3 |
| | </code> |
| | |
| | The SD card now can be accessed using the functions ''flash2_read_init'', ''flash2_read'', ''flash2_read_finish'' |
| |
