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| Both sides previous revisionPrevious revision | Next revisionBoth sides next revision |
| en:ztex_boards:ztex_fpga_boards:usb_powering [2011/12/05 14:35] – 84.181.74.229 | en:ztex_boards:ztex_fpga_boards:usb_powering [2011/12/07 22:19] – 84.181.93.233 |
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| If devices are powered by USB is must be ensured that the power requirement is within the USB specifications. USB standard guarntees 0.5W and allows up to 2.5W. | If devices are powered by USB is must be ensured that the power requirement is within the USB specifications. USB standard guarntees 0.5W and allows up to 2.5W. |
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| DDR SDRAM on [[http://www.ztex.de/usb-fpga-1/usb-fpga-1.11.e.html|USB-FPGA Modules 1.11]] requires about 1.9W and DDR2 SDRAM on [[http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html|USB-FPGA Modules 1.15]] about 1.4W at maximum frequency. A lot of power can be saved by reducing memory clock frequency and by turning off the parallel termination. E.g. at a memory frequency of 133 MHz the bandwidth is still 532 MByte/s which is sufficient for the most applications. | DDR SDRAM on [[http://www.ztex.de/usb-fpga-1/usb-fpga-1.11.e.html|USB-FPGA Modules 1.11]] requires about 1.8W and DDR2 SDRAM on [[http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html|USB-FPGA Modules 1.15]] about 1.4W at maximum frequency. A lot of power can be saved by reducing memory clock frequency and by turning off the parallel termination. E.g. at a memory frequency of 133 MHz the bandwidth is still 532 MByte/s which is sufficient for the most applications. |
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